Modern computer systems or networks may include components operating at various speeds. Despite operating at different speeds, two components may be in communication with each other. As an example, a multi-core processor or System-on-Chip (SoC) may include multiple cores that operate according to their own input clocks. A Network-on-Chip (NoC) may relay data between cores and other processing elements using a series of router switches and wiring resources. Since NoCs connect spatially dispersed sections of multi-core processors or SoCs, they may physically span either an entire chip or a large portion of a chip. In multi-core processors or SoCs with varying workloads, heterogeneous processing elements, unbalanced traffic, or fine-grained power management, different regions of a chip may be operated at different voltages and clock frequencies, thus complicating inter-core communication. To facilitate communication between different clock domains, a signal that is asynchronous with a clock domain to which it is communicated may be synchronized with that clock domain in order to avoid problems associated with metastability.
Like reference numbers and designations in the various drawings indicate like elements.